Tiburon Design Automation Information

Tiburon Design Automation provides Verilog-A and Verilog-AMS simulation components for SPICE simulators. The components are in use in nine commercial SPICE engines in addition to the Tiburon vamsSPICE demonstrator. We support the complete Accellera Verilog-AMS 2.3 standard with extensions. The base Verilog-A system is designed to cover the entire language with an elaboration and simulation API designed to allow Verilog-A based devices to behave identically to their builtin counterparts. The system is now in it's 3rd generation, has been deployed in 15 different simulators with total combined install base greater than 30k seats. Supports all traditional SPICE and RF analyses. Elaborator supports complex mixed hierarchies; simulation runtime is thread safe; system is supported on Linux, Windows and MAC. Comprehensive test suite and harness that gets tested on all integrations. The Tiburon Verilog-A fast compact model compiler allows compact transistor models defined in Verilog-A to be simulated with no loss in performance and no increase in memory footprint over traditional hand coded manually optimized models. Sophisticated analog block analysis allows the system to use the minimal state variable set for a given parameter set and optimizes the evaluation block for fast execution in the NR iteration. The Verilog-AMS simulation system offers efficient standards based mixed signal simulation by co-simulating a mixed signal design using existing analog and digital simulation engines. Opportunities at TDA Currently hiring EDA developers with experience in core analog and mixed-signal circuit simulation technologies. EECS, strong math and knowledge of analog simulation algorithms, Verilog-A, Verilog-AMS a plus. Work with a dedicated team focused on delivering next generation Verilog-A and Verilog-AMS solutions to the EDA analog simulation community.