Thomas Severin Location
Bavaria, Germany
Thomas Severin Work
- 2019 - now Engineerin Manager - Digital Design and DV @ Apple
- 2018 - 2019 Engineering Manager @ Intel Corporation
- 2015 - 2018 Senior Digital Design and Verification Engineer @ Intel Corporation
- 2012 - 2014 Senior Design Engineer - ASIC and FPGA @ metaio GmbH
- 2009 - 2012 Senior Design Engineer - ASIC and FPGA @ KUNBUS
- 2008 - 2009 SOC Product Development Engineer @ LSI, an Avago Technologies Company
- 2005 - 2008 ASIC Designer, Deputy Chief of ASIC Design Methodology Department @ Elmos
- 2003 - 2005 ASIC Designer @ MAZ Brandenburg GmbH
- 1999 - 2003 ASIC Designer @ SecWare Technologies AG
Thomas Severin Education
- Technical University Berlin
Thomas Severin Skills
- Memory
- Open Verification
- Field Programmable Gate Arrays Fpga
- System On A Chip Soc
- Logic Synthesis
- Functional Verification
- OVM
- RTL design
- ARM
- Technical Project
Thomas Severin Summary
Thomas Severin, based in Bavaria, Germany, is currently a Engineerin Manager - Digital Design and DV at Apple. Thomas Severin brings experience from previous roles at Intel Corporation, metaio GmbH and KUNBUS GmbH. Thomas Severin holds a Technical University Berlin. With a robust skill set that includes Memory, Open Verification, Field Programmable Gate Arrays Fpga, System On A Chip Soc, Logic Synthesis and more. Thomas Severin has 1 emails on RocketReach.
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