Thomas Paulsen Email
Senior Fpga Development Engineer @ Comcores ApS
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Thomas Paulsen Location
- Copenhagen, DK
Thomas Paulsen Work
- Senior Fpga Development Engineer @ (September 2018 - Present)
- Senior MTS Ii @ (February 2014 - August 2018)
- Contractor @ (April 2013 - November 2013)
- Development Engineer @ Velocytech Aps (February 2012 - February 2013)
- Staff Engineer @ Fibcom India LTD (September 2010 - November 2011)
- Staff Engineer @ (April 2007 - August 2010)
- Digital Ic Designer @ (March 2005 - March 2007)
- Development Engineer @ (January 2002 - January 2005)
- Asic Design Engineer @ Ip Semiconductors a/S (January 2001 - January 2002)
- Systems Engineer @ Terma Elektronik As (January 1998 - January 2001)
Thomas Paulsen Education
- Technical University of Denmark
Doctor of Philosophy
1992-1997 - Technical University of Denmark
Master of Science
1986-1992
Thomas Paulsen Skills
- Hardware Architecture
- Debugging
- Hyperlynx
- Perl
- RTL design
- ASIC
- SDH
- Verilog
- Xilinx
- TCL
- PRINCE2 Foundation
- Ethernet
- Formality
- FPGA
- VHDL
- ModelSim
- Primetime
- Python
- Quartus
- Quartus Ii
- Design Compiler
- Compilers
- Asic Design
- SystemVerilog
- IC
- Altera
- Digital Signal Processors
- Embedded Systems
- Functional Verification
Thomas Paulsen Summary
- Thomas Paulsen, based in Copenhagen, DK, is currently a Senior Fpga Development Engineer at Comcores Aps. Thomas Paulsen brings experience from previous roles at Vitesse Semiconductor Is Now Microsemi, Solarflare Communications, Velocytech Aps and Fibcom India LTD. Thomas Paulsen holds a 1992 - 1997 Doctor of Philosophy @ Technical University of Denmark. With a robust skill set that includes Hardware Architecture, Debugging, Hyperlynx, Perl, RTL design and more. Thomas Paulsen has 2 emails on RocketReach.
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