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Terry Wei Location
San Jose, CA, US
Terry Wei Work
Sr. Layout Engineer @ (November 2021 - Present)
Staff layout engineer @ (April 2018 - November 2021)
Senior Layout Engineer @ (March 2018 - November 2021)
layout Engineer @ (August 2009 - May 2018)
Terry Wei Education
San Jose State University
Bachelor of Science (BS) (Computer Science)
2002-2007
Terry Wei Skills
Analog
CMOS
DRC
Flash Memory
Hercules
IC
Layout Versus Schematic (LVS)
Mixed Signal
SoC
Synopsys tools
VLSI
LAN Switching
Cisco
Layout
Layout Versus Schematic Lvs
Terry Wei Summary
Terry Wei, based in San Jose, CA, US, is currently a Sr. Layout Engineer at TSMC. Terry Wei brings experience from previous roles at Western Digital and SanDisk®. Terry Wei holds a 2002 - 2007 Bachelor of Science (BS) in Computer Science @ San Jose State University. With a robust skill set that includes Analog, CMOS, DRC, Flash Memory, Hercules and more. Terry Wei has 3 emails and 1 mobile phone numbers on RocketReach.
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