Tejinder Kumar Email
Sr. Hardware Design Engineer @ STMicroelectronics
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Tejinder Kumar Location
- Moga, PB, IN
Tejinder Kumar Work
- 2011 -now Sr. Hardware Design Engineer @
- 2009 -2011 Design Engineer @
Tejinder Kumar Education
- Thapar University, Patiala
Master of Technology (M.Tech.) (VLSI Design & CAD)
2007-2009 - Shaheed Bhagat Singh College of Engineering & Technology, Ferozpur
Bachelor of Technology (B.Tech.) (Electronics & Communication)
2003-2007
Tejinder Kumar Skills
- SoC
- Static Timing Analysis
- ASIC
- RTL design
- CMOS
- NCSim
- Physical Design
- Mixed Signal
- Timing Closure
- Verilog
- Integrated Circuit Design
- Functional Verification
- IC
- VLSI
- DFT
- Logic Synthesis
- Semiconductors
- Formal Verification
- Post Silicon Validation
- Field Programmable Gate Arrays Fpga
- C
- System On A Chip Soc
- Digital Design
- Xilinx ISE
- USB
- High Speed Serial Links
- Physical Layer
- Application Specific Integrated Circuits Asic
- FPGA
- Mipi Mphy
- VHDL
- EDA
- Energy Efficient Ethernet
- Clock Domain Crossing
- Field Programmable Gate Arrays
- System on a Chip
- Application Specific Integrated Circuits
Tejinder Kumar Summary
- Tejinder Kumar, based in Moga, PB, IN, is currently a Sr. Hardware Design Engineer at STMicroelectronics. Tejinder Kumar brings experience from previous roles at STMicroelectronics. Tejinder Kumar holds a 2007 - 2009 Master of Technology (M.Tech.) in VLSI Design & CAD @ Thapar University, Patiala. With a robust skill set that includes SoC, Static Timing Analysis, ASIC, RTL design, CMOS and more. Tejinder Kumar has 1 emails on RocketReach.
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