Tejaswee Rayudu's Location

San Jose, California, United States

Tejaswee Rayudu's Work

Tejaswee Rayudu's Education

  • UCSC Silicon Valley Extension

    2018 - 2018
  • San Jose State University

    Master of Science (Electrical Engineering)

    2016 - 2017
  • Jawaharlal Nehru Technological University, Kakinada

    Bachelor of Technology (Electronics Engineering)

    2011 - 2015

Tejaswee Rayudu's Skills

  • Verilog
  • SystemVerilog
  • Very Large Scale Integration
  • RTL design
  • Application Specific Integrated Circuits
  • C
  • VHDL
  • Python
  • Matlab
  • NI LabVIEW

Tejaswee Rayudu's Summary

Tejaswee Rayudu, based in San Jose, California, United States, is currently a Senior Silicon Design Engineer at Amd, bringing experience from previous roles at Amd, Scalable Systems Research Labs Inc., San Jose State University and NTPC. Tejaswee Rayudu holds a 2018 - 2018 UCSC Silicon Valley Extension. With a robust skill set that includes Verilog, SystemVerilog, Very Large Scale Integration, RTL design, Application Specific Integrated Circuits and more, Tejaswee Rayudu contributes valuable insights to the industry. Tejaswee Rayudu has 1 email on RocketReach.

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