Te-Chen Lin Email
Sr. RFFE Hardware Design Engineer @ Qualcomm
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Te-Chen Lin Location
- San Diego, CA, US
Te-Chen Lin Work
- Sr. RFFE Hardware Design Engineer @ (November 2020 - Present)
- RX TX Doppler Radar Design @ (January 2019 - June 2020)
- Teaching Assistant @ (September 2019 - December 2019)
- Undergraduate Researcher @ (July 2016 - June 2018)
- Analog IC Design Engineering Intern @ National Chip Implementation Center (CIC) (July 2017 - August 2017)
Te-Chen Lin Education
- University of California, Davis
Master's degree (Electrical and Computer Engineering)
2018-2020 - National Chiao Tung University
Bachelor's degree (Electrophysics)
2014-2018
Te-Chen Lin Skills
- Advanced Design System (ADS)
- Analog Circuit Design
- C
- CMOS
- Cadence Virtuoso
- Hspice
- IC Layout
- LabVIEW
- Leadership
- MATLAB
- Printed Circuit Board (PCB) Design
- RF IC Design
- VLSI System Design
- Verilog
Te-Chen Lin Summary
- Te-Chen Lin, based in San Diego, CA, US, is currently a Sr. RFFE Hardware Design Engineer at Qualcomm. Te-Chen Lin brings experience from previous roles at University of California, Davis, National Chiao Tung University and National Chip Implementation Center (CIC). Te-Chen Lin holds a 2018 - 2020 Master's degree in Electrical and Computer Engineering @ University of California, Davis. With a robust skill set that includes Advanced Design System (ADS), Analog Circuit Design, C, CMOS, Cadence Virtuoso and more. Te-Chen Lin has 2 emails on RocketReach.
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