Tarun Agarwal Email & Phone Number
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Tarun Agarwal Location
- Gandhinagar, GJ, IN
Tarun Agarwal Work
- 2021 -now Faculty @
- 2018 -2021 Postdoctoral Researcher @
- 2013 -2018 Doctoral Researcher @
- 2012 -2013 Research Assistant @
- 2010 -2012 Component Design Engineer @ Intel India Technology Pvt Ltd
- 2010 -2010 Research Intern (Compact Modeling Group) @
Tarun Agarwal Education
- KU Leuven
Doctor of Philosophy - PhD (Electrical and Electronics Engineering)
2014-2018 - Indian Institute of Technology, Delhi
M.Tech (VLSI Design, Tools and Technology)
2008-2010 - Aligarh Muslim University
B.TECH (electronics engineering)
2004-2008
Tarun Agarwal Skills
- Technology
- Cadence Virtuoso
- Computer Architecture
- Analog Circuit Design
- SPICE
- RTL design
- ASIC
- Modeling
- VLSI
- Integrated Circuit Design
- TCL
- Circuit Design
- CMOS
- FPGA
- Simulations
- Semiconductors
- Physical Design
- Research
- Static Timing Analysis
- Low Power Design
- IC
Tarun Agarwal Summary
- Tarun Agarwal, based in Gandhinagar, GJ, IN, is currently a Faculty at Indian Institute of Technology Gandhinagar. Tarun Agarwal brings experience from previous roles at ETH Zurich, Department of Information Technology and Electrical Engineering, imec, Indian Institute of Technology, Bombay and Intel India Technology Pvt Ltd. Tarun Agarwal holds a 2014 - 2018 Doctor of Philosophy - PhD in Electrical and Electronics Engineering @ KU Leuven. With a robust skill set that includes Technology, Cadence Virtuoso, Computer Architecture, Analog Circuit Design, SPICE and more. Tarun Agarwal has 2 emails and 2 mobile phone numbers on RocketReach.
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