Taras Vertypolokh's Location
Toronto, ON, CA
Taras Vertypolokh's Work
- Asic Design Engineer @ AMD
- Pcie Ip Asic Design Verification Pey @ AMD
Taras Vertypolokh's Education
Taras Vertypolokh's Skills
Taras Vertypolokh's Summary
Taras Vertypolokh, based in Toronto, ON, CA, is currently a Asic Design Engineer at Amd, bringing experience from previous roles at Amd. Taras Vertypolokh holds a 2010 - 2015 Bachelor of Applied Science in Computer Engineering @ University of Toronto. With a robust skill set that includes SystemVerilog, Microsoft Office, Teamwork, PCIe, Universal Verification Methodology and more, Taras Vertypolokh contributes valuable insights to the industry. Taras Vertypolokh has 1 email on RocketReach.