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Tapas Nandy Location
Bengaluru, KA, IN
Tapas Nandy Work
2025 -now Sr. Director @
2018 -2024 Engineering Director, Analog and Mixed Signal IP Architect @
2015 -2018 Director - R and D, High Speed PHY, Solutions Group @
2009 -2015 Sr. Group Manager - Analog and Mixed Signal IP and High Speed Links PHYs @
1999 -2009 Design Manager - Analog and Mixed Signal IP and High Speed Links PHYs @
1995 -1998 Senior Design Engineer @
1992 -1995 Design Engineer @
1990 -1992 Member Techical Staff @ Centre for Development of Advanced Computing, Pune
Tapas Nandy Education
Indian Institute of Technology, Kanpur
M.Tech (Microelectronics)
1988-1990
Bengal Engineering College (Calcutta University), Shibpur. [Now : IIEST, Shibpur]
Bachelor of Engineering (B.E.) (Electronics and Tele-Communication Engineering)
1984-1988
Tapas Nandy Skills
Mixed Signal
Analog
SERDES
Circuit Design
IC
VLSI
Silicon
Power Management
Semiconductors
DAC
Analog Circuit Design
Oscillators
IP development
IP
Analog Design
ASIC
Integrated Circuits (IC)
CMOS
Very-Large-Scale Integration (VLSI)
System on a Chip (SoC)
Verilog
SoC
System On A Chip Soc
Graphic Design
Business Analysis
Microsoft Office
Integrated Circuits Ic
PHY
Microsoft Excel
SQL
Design
Very Large Scale Integration Vlsi
Vlsi Design
R&D
Very Large Scale Integration
Integrated Circuits
System on a Chip
Tapas Nandy Summary
Tapas Nandy, based in Bengaluru, KA, IN, is currently a Sr. Director at Microsoft India. Tapas Nandy brings experience from previous roles at Intel Corporation, Synopsys Inc and STMicroelectronics. Tapas Nandy holds a 1988 - 1990 M.Tech in Microelectronics @ Indian Institute of Technology, Kanpur. With a robust skill set that includes Mixed Signal, Analog, SERDES, Circuit Design, IC and more. Tapas Nandy has 1 emails and 3 mobile phone numbers on RocketReach.
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