Tan Hon Email
RTL Design Engineer (Ethernet soft IP) @ Lattice Semiconductor
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Tan Hon Location
- Johor, Malaysia
Tan Hon Work
- 2022 -now RTL Design Engineer (Ethernet soft IP) @
- 2018 -2020 Test Content Development Engineer (ATPG) @
- 2017 -2018 System Engineer (6DoF tracking) @ PixArt Imaging Inc.
- 2015 -2016 RTL Design Engineer (server chipset) @ Intel Corporation (DCG)
Tan Hon Education
- Universiti Teknologi Malaysia
Doctor of Philosophy - PhD (Computer Engineering)
2016-2022 - Universiti Teknologi Malaysia
Master's Degree (Computer Engineering)
2012-2015 - Universiti Teknologi Malaysia
Bachelor's Degree (Computer Engineering)
2008-2012 - SMJK Jit Sin
STPM (Science)
2005-2007
Tan Hon Summary
- Tan Hon, based in Johor, Malaysia, is currently a RTL Design Engineer (Ethernet soft IP) at Lattice Semiconductor. Tan Hon brings experience from previous roles at Intel Corporation (PSG), PixArt Imaging Inc. and Intel Corporation (DCG). Tan Hon holds a 2016 - 2022 Doctor of Philosophy - PhD in Computer Engineering @ Universiti Teknologi Malaysia. Tan Hon has 2 emails on RocketReach.
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