Sy Tran Email & Phone Number
Wafer Sort and Final Test PCB Hardware Technology Development Lead - MTS Product Development Engineer @ AMD
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Sy Tran Location
- Austin, TX, US
Sy Tran Work
- 1992 -now Wafer Sort and Final Test PCB Hardware Technology Development Lead - MTS Product Development Engineer @
Sy Tran Education
- Park University
Sy Tran Skills
- Product Engineering
- Debugging
- Test Engineering
- Signal Integrity
- Testing
- Hardware
- PCIe
- Engineering
- Semiconductors
- Mixed Signal
- Analog
- Product Management
- Microprocessors
- Reliability
- Semiconductor Industry
- Hardware Architecture
- Failure Analysis
- Silicon
- Electronics
- PCB design
- Characterization
Sy Tran Summary
- Sy Tran, based in Austin, TX, US, is currently a Wafer Sort and Final Test PCB Hardware Technology Development Lead - MTS Product Development Engineer at Advanced Micro Devices. Sy Tran holds a Park University. With a robust skill set that includes Product Engineering, Debugging, Test Engineering, Signal Integrity, Testing and more. Sy Tran has 3 emails and 3 mobile phone numbers on RocketReach.
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