2009 -2012 Senior Staff Engineer and Architect @ Onespin Solutions
2005 -2009 Senior Engineer @ Onespin Solutions
2005 -2005 Postdoc @
2000 -2005 PHD Student @
Sven Beyer Education
Universität des Saarlandes 2000-2005
Sven Beyer Skills
Formal Verification
Functional Verification
Verilog
Hardware Architecture
TCL
VHDL
SystemVerilog
SoC
Logic Synthesis
EDA
Processors
SVA
Technical Presentations
Microprocessors
PSL
Technical Writing
RTL design
System Verilog
ASIC
FPGA
Semiconductors
Risc V
Application Specific Integrated Circuits Asic
Application Specific Integrated Circuits
Sven Beyer Summary
Sven Beyer, based in Munich, BY, DE, is currently a Product Manager Design Verification at Onespin Solutions. Sven Beyer brings experience from previous roles at Onespin Solutions and Saarland University. Sven Beyer holds a 2000 - 2005 Universität des Saarlandes. With a robust skill set that includes Formal Verification, Functional Verification, Verilog, Hardware Architecture, TCL and more. Sven Beyer has 1 emails on RocketReach.
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