Sumesh Subhash Email
Senior Principal Engineer @ Celero Communications
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Sumesh Subhash Location
- San Jose, CA, US
Sumesh Subhash Work
- Senior Principal Engineer @ (August 2025 - Present)
- Principal ASIC Design Engineer @ (February 2025 - August 2025)
- Principal ASIC Design Engineer @ (July 2022 - February 2025)
- Staff Asic Design Engineer @ (February 2018 - June 2022)
- Senior Design Engineer @ (August 2017 - January 2018)
- Senior Design Engineer @ (July 2012 - August 2017)
- Senior Project Engineer @ (March 2007 - February 2010)
- Senior Designer @ (March 2004 - February 2007)
Sumesh Subhash Education
- College of Engineering Trivandrum
B Tech (Electronics and Communication Engineering)
1997-2001
Sumesh Subhash Skills
- RTL Design
- VLSI
- Static Timing Analysis
- Logic Synthesis
- DFT
- Mixed Signal
- Digital Circuit Design
- Customer Communication
- Field-Programmable Gate Arrays (FPGA)
- Verilog
- Application-Specific Integrated Circuits (ASIC)
- System on a Chip (SoC)
- Semiconductors
- Integrated Circuit Design
Sumesh Subhash Summary
- Sumesh Subhash, based in San Jose, CA, US, is currently a Senior Principal Engineer at CELERO COMMUNICATIONS INC. Sumesh Subhash brings experience from previous roles at Nokia, Infinera and Arasan Chip Systems Inc.. Sumesh Subhash holds a 1997 - 2001 B Tech in Electronics and Communication Engineering @ College of Engineering Trivandrum. With a robust skill set that includes RTL Design, VLSI, Static Timing Analysis, Logic Synthesis, DFT and more. Sumesh Subhash has 1 emails on RocketReach.
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