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Suma Bhat Location
Coppell, TX, US
Suma Bhat Work
2016 -now Test Staff Engineer @
2015 -2016 Test Engineer @
2011 -2015 Post silicon Bench characterization and validation Engineer. @
2008 -2009 JTAG and DFT Engineer @
2007 -2007 Engineering Support @
2005 -2007 Test Engineer @ MRO-TEK
Suma Bhat Education
Mangalore University
Master of Science (MSc) (Electronics)
2002-2004
Dr N.S.A.M. First grade college Nitte
Bachelor of Science (BSc) (Maths,Electronics,Computer Science)
1999-2002
Dr A V Baliga College Kumta
PUC
1997-1999
Suma Bhat Skills
VLSI
JTAG
FPGA
DFT
CPLD
Labview
Test Stand
Characterization
Testing
Silicon
Debugging
Analog
ASIC
Power Management
Mixed Signal
C
Verilog
Semiconductors
Test Engineering
Very-Large-Scale Integration (VLSI)
Joint Test Action Group (JTAG)
Application-Specific Integrated Circuits (ASIC)
Field-Programmable Gate Arrays (FPGA)
Failure analysis
Fault localisation
Field Programmable Gate Arrays Fpga
Data Validation
Engineering
Microsoft Office
Application Specific Integrated Circuits Asic
Very Large Scale Integration Vlsi
Joint Test Action Group Jtag
Very Large Scale Integration
Joint Test Action Group
Application Specific Integrated Circuits
Field Programmable Gate Arrays
Suma Bhat Summary
Suma Bhat, based in Coppell, TX, US, is currently a Test Staff Engineer at STMicroelectronics. Suma Bhat brings experience from previous roles at Anora, KarMic Design Private Ltd, Tejas Networks and Cypress Semiconductor. Suma Bhat holds a 2002 - 2004 Master of Science (MSc) in Electronics @ Mangalore University. With a robust skill set that includes VLSI, JTAG, FPGA, DFT, CPLD and more. Suma Bhat has 2 emails and 1 mobile phone numbers on RocketReach.
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