Sujith Perla Email & Phone Number
Principal MTS - ASIC and FPGA @ Lyte
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Sujith Perla Location
- Sunnyvale, CA, US
Sujith Perla Work
- Principal MTS - ASIC and FPGA @ (August 2023 - Present)
- Senior Digital Design Engineer @ (July 2020 - August 2023)
- Senior Digital Design Engineer @ Verb Surgical Inc. (Acquired by Johnson & Johnson) (April 2017 - June 2020)
- Senior Digital Design Engineer ASIC and FPGA @ (July 2013 - March 2017)
- Digital Design Engineer @ Aperi Corporation (Acquired by Net Sight) (February 2015 - November 2015)
- Angel Squad Member @ (November 2025 - Present)
- FPGA Research Intern @ NSF Center for High-Performance Reconfigurable Computing (CHREC) (January 2012 - September 2012)
- Engineering Intern @ Central Institute of Tool Design (October 2010 - December 2010)
Sujith Perla Education
- University of Florida
MS (Electrical and Computer Engineering)
2011-2013
Sujith Perla Skills
- System on a Chip (SoC)
- Leadership
- Verilog
- VHDL
- C
- C++
- Xilinx
- FPGA
- VLSI
- Cadence Virtuoso
- Perl
- Computer Architecture
- Synopsys tools
- LTSpice
- Pspice
- Matlab
- ASIC
- RTL coding
- Logic Design
- Simulink
- Spectre
- RTL design
- Simulation
- Digital Design
- Hardware Design
- Conformal LEC
- Lint
- CDC
- ModelSim
- Analytical Skill
- Simplescalar
- Design
Sujith Perla Summary
- Sujith Perla, based in Sunnyvale, CA, US, is currently a Principal MTS - ASIC and FPGA at Lyte. Sujith Perla brings experience from previous roles at Intuitive, Verb Surgical Inc. (Acquired by Johnson & Johnson), Qualcomm and Aperi Corporation (Acquired by Net Sight). Sujith Perla holds a 2011 - 2013 MS in Electrical and Computer Engineering @ University of Florida. With a robust skill set that includes System on a Chip (SoC), Leadership, Verilog, VHDL, C and more. Sujith Perla has 2 emails and 1 mobile phone numbers on RocketReach.
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