Subham Banerjee Email
Principal Design Verification Architect and EMEA IP Lead @ AMD
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Subham Banerjee Location
- Cork, IE
Subham Banerjee Work
- 2023 -now Principal Design Verification Architect and EMEA IP Lead @
- 2022 -2023 Sr. Design Verification Manager and Technical Lead @
- 2021 -2022 Sr. Staff Design Verification Lead @
- 2019 -2021 Design Manager and TechLead @
- 2017 -2019 Staff(Lead) Design Engineer @
- 2013 -2017 Sr. Design Engineer @
- 2010 -2013 Sr. ASIC Design Engineer @
- 2009 -2010 Sr. Design Engineer @
- 2008 -2009 Design Engineer @
- 2006 -2008 Project Engineer @ Texas Instruments/ Wipro Technologies
Subham Banerjee Education
- Kalyani Govt. Engineering College(K.G.E.C)
B.Tech (Electronics)
2002-2006 - Mc. william H.S. School
Higher Secondary
Subham Banerjee Skills
- SystemVerilog
- ASIC
- SoC
- UVM
- VMM
- HVL - System Verilog
- MESI Protocol for Cacche Coherency in Multicore Architecture.
- L2 Processing in Routing ASICs
- Verification Methodologies: VMM & UVM
- Verilog
- Vmm and Uvm
- Design
- Hvl
- Ic Design
- Verification Methodologies
- Mesi Protocol for Cacche Coherency in Multicore Architecture
- System Verilog
- Platform
- IC
- Silicon Bringup
- Ethernet Phy
- Usb Phy
- Clock Domain Crossing
- Mixed Signal Verification
- Phase Locked Loop
Subham Banerjee Summary
- Subham Banerjee, based in Cork, IE, is currently a Principal Design Verification Architect and EMEA IP Lead at AMD. Subham Banerjee brings experience from previous roles at Qualcomm, Intel Corporation and Xilinx. Subham Banerjee holds a 2002 - 2006 B.Tech in Electronics @ Kalyani Govt. Engineering College(K.G.E.C). With a robust skill set that includes SystemVerilog, ASIC, SoC, UVM, VMM and more. Subham Banerjee has 2 emails on RocketReach.
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