Steven Raasch Email & Phone Number
GFX IP RAS Architect @ AMD
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Steven Raasch Location
- Austin, TX, US
Steven Raasch Work
- GFX IP RAS Architect @ (April 2026 - Present)
- Client CPU Performance Engineer and Manager @ (November 2019 - April 2026)
- Scalable Interconnect Team Lead @ AMD Research (August 2018 - November 2019)
- Component Integration Lead @ AMD Research (January 2017 - November 2019)
- Reliability and Resiliency Lead @ AMD Research (December 2015 - November 2019)
- Senior Design Engineer @ (January 2004 - December 2015)
- Co-Owner @ Radix Computer Services (January 2000 - January 2004)
- GSRA @ (January 1996 - January 2004)
- Senior Engineer @ Casino Data Systems (January 1995 - January 1996)
- Senior Engineer @ EG&G Special Projects (January 1990 - January 1995)
- Engineer @ Martin Marietta (January 1987 - January 1990)
Steven Raasch Education
- University of Michigan
Ph.D. (Computer Architecture)
1998-2004 - University of Michigan
MSE (Computer Science & Engineering)
1996-1998 - Virginia Tech
BSEE (Electrical Engineering)
1983-1987 - Virginia Tech
Bachelor's degree (Electrical)
1987
Steven Raasch Skills
- ASIC
- Application-Specific Integrated Circuits (ASIC)
- Architecture
- Architectures
- C
- C++
- Computer Architecture
- Debugging
- Electrical Engineering
- Embedded Systems
- Engineering
- Field-Programmable Gate Arrays (FPGA)
- Hardware Architecture
- Hardware Design
- Integrated Circuits (IC)
- Integration
- Leadership
- Linux
- Microprocessors
- Microsoft Office
- Modeling
- Multithreading
- Perl
- Programming
- Python
- Reliability
- Semiconductors
- Simulation
- SoC
- Software Development
- System Architecture
- System on a Chip (SoC)
- Team Building
- Technical Writing
- Technology Development
- Logic Design
- Planning
- Field Programmable Gate Arrays Fpga
- Computer Hardware
- System on a Chip Soc
- Simultaneous Multithreading
- Processors
- Verilog
- Soft Errors
- Integrated Circuits Ic
- Application Specific Integrated Circuits Asic
- Performance Modeling
- Pipelines
- On Chip Networks Noc
- Simulations
- Project Management
- Design
- Performance Analysis
- Research
- Ser Mitigation Architectural Techniques
- Computer Engineering
- Availability
- Microarchitecture
- High Performance Computing
- Job Scheduling
- System on a Chip
- Integrated Circuits
- Ser Mitigation
- Field Programmable Gate Arrays
- Application Specific Integrated Circuits
Steven Raasch Summary
- Steven Raasch, based in Austin, TX, US, is currently a GFX IP RAS Architect at AMD. Steven Raasch brings experience from previous roles at AMD and AMD Research. Steven Raasch holds a 1998 - 2004 Ph.D. in Computer Architecture @ University of Michigan. With a robust skill set that includes ASIC, Application-Specific Integrated Circuits (ASIC), Architecture, Architectures, C and more. Steven Raasch has 4 emails and 1 mobile phone numbers on RocketReach.
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