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Steven Atherton Location
Austin, TX, US
Steven Atherton Work
IC Package Co-Design Engineer @ (November 2020 - Present)
Manager of Package Design, Reliability and Simulation @ (November 2015 - November 2020)
IC Package Design Engineer @ (October 2005 - November 2015)
Hardware Design Engineer @ (January 2000 - January 2005)
Steven Atherton Education
The University of Texas at Austin
BA (Mechanical Engineering)
1995-1999
Steven Atherton Skills
ASIC
Analog
CMOS
Design of Experiments
EDA
Electrical Simulation
Failure Analysis
Focused Team Leadership
IC
Integrated Circuit Design
JMP
Manufacturing
Microelectronics
Mixed Signal
PCB Design
Package Design
Polished Communication Skills
Process Development
Product Development
Product Engineering
Quality Control
R&D
Semiconductor Industry
Semiconductors
Silicon
SoC
Technical Writing
Test Engineering
Graphic Design
Integrated Circuit
Microsoft Excel
Testing
Design
Hardware
Steven Atherton Summary
Steven Atherton, based in Austin, TX, US, is currently a IC Package Co-Design Engineer at Cirrus Logic. Steven Atherton brings experience from previous roles at Cirrus Logic, Freescale Semiconductor and Motorola Semiconductor. Steven Atherton holds a 1995 - 1999 BA in Mechanical Engineering @ The University of Texas at Austin. With a robust skill set that includes ASIC, Analog, CMOS, Design of Experiments, EDA and more. Steven Atherton has 2 emails and 4 mobile phone numbers on RocketReach.
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