Steve Lamontagne's Location
Ottawa, ON, CA
Steve Lamontagne's Work
- Design Verification Principal Engineer @ Marvell India
- Design and Verification Engineer @ Rianta Solutions Inc.
- Staff Electronic Design Engineer @ IDT - Integrated Device Technology, Inc.(acquired by Renesas)
- ASIC Design and Verification Engineer @ IDT - Integrated Device Technology, Inc.(acquired by Renesas)
Steve Lamontagne's Education
- University of Ottawa
Computer (Engineering)
2002 - 2006 - Telfer School of Management at the University of Ottawa
Master of Business Administration (M.B.A.)
2014 - 2016
Steve Lamontagne's Skills
- Python
- SystemVerilog
- Semiconductors
- Simulations
- Design
- Integrated Circuits Ic
- Debugging
- Application Specific Integrated Circuits Asic
- FPGA
- Field Programmable Gate Arrays Fpga
Steve Lamontagne's Summary
Steve Lamontagne, based in Ottawa, ON, CA, is currently a Design Verification Principal Engineer at Marvell Technology, bringing experience from previous roles at Rianta Solutions Inc. and Integrated Device Technology Inc. Steve Lamontagne holds a 2002 - 2006 Computer in Engineering @ University of Ottawa. With a robust skill set that includes Python, SystemVerilog, Semiconductors, Simulations, Design and more, Steve Lamontagne contributes valuable insights to the industry. Steve Lamontagne has 4 emails and 1 mobile phone number on RocketReach.
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