Steve Bourassa's Work
- FPGA Design and Verification @ Teradyne
- FPGA Design and Verification @ Sycamore Networks
- FPGA Design and Verification @ Convergent Networks
- Design and Development Engineer @ Bay Networks
- Design and Development Engineer @ Cascade Communications
- MTS @ Raytheon Technologies
Steve Bourassa's Education
- Northeastern University1985 - 1990
Steve Bourassa's Skills
- SystemVerilog
- Analog
- Hardware Architecture
- Embedded Systems
- ASIC
- FPGA
- SoC
- Verilog
- Field Programmable Gate Arrays Fpga
- VHDL
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