Stephen Bigelow's Location
Banks, OR, US
Stephen Bigelow's Work
- Sr. Staff Architect @ Intel Corporation
- HW Engr Manager @ Intel Corporation
- Staff Design Engineer, Test and Sort Tech Development @ Intel Corporation
- Staff Engineer @ Intel Corporation
- Sr. Hardware Design Engineer @ Cadence Design Systems
- Design Engineer @ Sentrol, Inc (now GE)
- Design Engineer @ GE Security (aka GE Interlogix, Interlogix, SLC Technologies, Sentrol, Aritech)
- Technician @ Oregon State
- Intern @ Tektronix
- Technician @ ProTech Electronics
Stephen Bigelow's Education
- Oregon Health & Science University
(MSEE)
1998 - 2002 - Oregon State University
BSEE (Electrical Engineering)
1991 - 1996
Stephen Bigelow's Skills
- Embedded Software
- Hardware Architecture
- Engineering Management
- RF
- Signal Integrity
- Debugging
- System on a Chip Soc
- Sensors
- PCB design
- Processors
Stephen Bigelow's Summary
Stephen Bigelow, based in Banks, OR, US, is currently a Sr. Staff Architect at Intel Corporation, bringing experience from previous roles at Intel Corporation, Intel and Cadence. Stephen Bigelow holds a 1998 - 2002 Oregon Health & Science University. With a robust skill set that includes Embedded Software, Hardware Architecture, Engineering Management, RF, Signal Integrity and more, Stephen Bigelow contributes valuable insights to the industry. Stephen Bigelow has 2 emails on RocketReach.
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