Senior Circuit Designer @ (September 1998 - November 2021)
Circuit Designer @ Ross Technology (January 1996 - January 1998)
Staff Circuit Designer @ IBM Burlington (January 1994 - January 1996)
Circuit Designer @ IBM East Fishkill (January 1987 - January 1994)
Stanley Ho Education
Rensselaer Polytechnic Institute
Master of Science - MS (Electrical and Electronics Engineering)
Rensselaer Polytechnic Institute
Bachelor of Science - BS (Computer Engineering)
Stanley Ho Skills
Architecture
C
C (Programming Language)
C++
CMOS
Cadence
Cadence Virtuoso
Circuit
Circuit Design
Clock Distribution
Computer Architecture
Computer Hardware
Debugging
Electrical Engineering
Electronic Circuits
Electronics
Engineering
GitHub
H-Spice
High Performance Computing
IC
Integration
Jira
Linux
Microarchitecture
Microprocessors
Optimization
Perl
RTL Design
RTL Development
SPICE
SRAM
Semiconductors
SoC
Static Timing Analysis
Synopsys Primetime
Synopsys tools
SystemVerilog
Tcl-Tk
Timing
Transistors
VHDL
Verilog
Very-Large-Scale Integration (VLSI)
Windows
X86
dynablock
dynacell
regfile
starRC
Solution Architecture
Stanley Ho Summary
Stanley Ho, based in Austin, TX, US, is currently a CPU Physical Design Engineer at Intel Corporation. Stanley Ho brings experience from previous roles at Intel Corporation and Centaur Technology. Stanley Ho holds a Master of Science - MS in Electrical and Electronics Engineering @ Rensselaer Polytechnic Institute. With a robust skill set that includes Architecture, C, C (Programming Language), C++, CMOS and more. Stanley Ho has 2 emails and 1 mobile phone numbers on RocketReach.
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