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Sreenivas Basireddy Location
Dresden, SN, DE
Sreenivas Basireddy Work
Application Engineer @ (December 2021 - Present)
Post Silicon Validation Engineer @ (July 2018 - November 2021)
Post Silicon Validation Engineer - II @ (November 2017 - July 2018)
Post Silicon Validation Engineer @ (October 2015 - November 2017)
Sreenivas Basireddy Education
Rajiv Gandhi University of Knowledge Technologies, RKValley (RAC)
Bachelor of Technology - BTech (Electronics and Communications Engineering)
2011-2015
Sreenivas Basireddy Skills
ATE
Automatic Test Pattern Generation (ATPG)
C (Programming Language)
C++
CPP
DFT
Debugging
Debugging on v93k
Digital Circuit Design
Electronics
Embedded Systems
Hardware Architecture
High-speed Digital Design
Integrated Circuits (IC)
JTAG
Joint Test Action Group (JTAG)
Linux
Low-power Design
Matlab
Microsoft Office
Mixed Signal
Process Validation
SCAN
Semiconductors
Test method implementation
Testing
Testing IC
Testing in Digital domain
V93k vcd wgl pattern conversion
Verilog
data anysis and yield improvement
post silicon validation
silicon
Sreenivas Basireddy Summary
Sreenivas Basireddy, based in Dresden, SN, DE, is currently a Application Engineer at Nash Technologies. Sreenivas Basireddy brings experience from previous roles at Arm and Tessolve. Sreenivas Basireddy holds a 2011 - 2015 Bachelor of Technology - BTech in Electronics and Communications Engineering @ Rajiv Gandhi University of Knowledge Technologies, RKValley (RAC). With a robust skill set that includes ATE, Automatic Test Pattern Generation (ATPG), C (Programming Language), C++, CPP and more. Sreenivas Basireddy has 2 emails on RocketReach.
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