sreenath g Email
Design Verification Engineer @ Chipsolve Technologies
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sreenath g Location
- Hyderabad, TG, IN
sreenath g Work
- Design Verification Engineer @ (July 2026 - Present)
- Intern @ (September 2025 - June 2026)
- Internship Trainee @ (March 2025 - September 2025)
- Assistant Manager @ (July 2014 - February 2025)
sreenath g Education
- Birla Institute of Technology and Science, Pilani
Master of Technology - MTech (Microelectronics Engineering)
2022-2024 - Cochin University of Science and Technology
Bachelor of Technology (B.Tech.) (Electrical, Electronics and Communications Engineering)
2009-2013 - SDVEMHSS SCHOOL 2008-2012
sreenath g Summary
- sreenath g, based in Hyderabad, TG, IN, is currently a Design Verification Engineer at Chipsolve Technologies Private Ltd. sreenath g brings experience from previous roles at Maven Silicon, VLSI EXPERT Private Limited and CSB Bank Limited. sreenath g holds a 2022 - 2024 Master of Technology - MTech in Microelectronics Engineering @ Birla Institute of Technology and Science, Pilani. sreenath g has 1 emails on RocketReach.
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