Sreedhara Tr Email & Phone Number
VP Post Si Validation and Test Engineering @ Kaynes Semicon Private Limited
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Sreedhara Tr Location
- Bengaluru, KA, IN
Sreedhara Tr Work
- VP Post Si Validation and Test Engineering @ (October 2025 - Present)
- Director (consulting) Si Validation and Embedded SW and Android integration @ SMARTiCON Tech Solutions Private Limited (February 2025 - Present)
- Site lead, Sr. Manager Systems Design Eng (Post Si Validation) @ (August 2022 - January 2025)
- Sr Director, Post Silicon Validation, Platform validation, Embedded and Mobile System SW Integration @ (April 2022 - July 2022)
- Director, Post Si, SOC, Platform Validation, and Mobile System Integration @ (January 2017 - March 2022)
- Director @ (July 2014 - December 2016)
- Senior Engineering Manager and Program manager @ (August 2003 - June 2014)
- Project lead @ (June 1995 - August 2003)
Sreedhara Tr Education
- Indian Institute of Science (IISc)
PG Level Advanced Certification Programme in VLSI Chip Design (Integrated Circuit Design)
2025-2025 - Indian Institute of Science (IISc)
PG Level Advanced Certification Programme in "VLSI Chip Design" (Integrated Circuit Design)
2025-2025 - B. M. S. College of Engineering
BE (Electronics and Communications)
1984-1989 - Bangalore University
BE (Electronics and Communications)
1984-1989 - Vijaya Highschool
SSLC (Mathematics and Physics)
1979-1982
Sreedhara Tr Skills
- SoC
- Processors
- Engineering Management
- Debugging
- Testing
- Embedded Systems
- System Software
- Android
- Software Project Management
- Embedded Software
- C
- Unix
- Program Management
- Intel
- Agile Methodologies
- Software Development
- Management
- Integration
- Platform Integration
- C++
- Semiconductors
- Linux
- Outsourcing
- Mobile Platforms
- Microprocessors
- Agile Project Management
- Project Delivery
- Business Development
- Mobile Devices
- Android Development
- System on a Chip Soc
- System on a Chip
Sreedhara Tr Summary
- Sreedhara Tr, based in Bengaluru, KA, IN, is currently a VP Post Si Validation and Test Engineering at Kaynes Semicon Pvt Ltd. Sreedhara Tr brings experience from previous roles at SMARTiCON Tech Solutions Private Limited, AMD, Tessolve and Tessolve Semiconductor PVT LTD (TessolveDTS Inc). Sreedhara Tr holds a 2025 - 2025 PG Level Advanced Certification Programme in VLSI Chip Design in Integrated Circuit Design @ Indian Institute of Science (IISc). With a robust skill set that includes SoC, Processors, Engineering Management, Debugging, Testing and more. Sreedhara Tr has 1 emails and 1 mobile phone numbers on RocketReach.
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