Sorel Horovitz's Location
Israel
Sorel Horovitz's Work
- Chip Design Manager @ SatixFy
- Senior Design Manager @ Marvell Israel Ltd.
- Design Manager @ Marvell Israel Ltd.
- Senior Backend Team Leader @ Marvell Israel Ltd.
- Full Chip Timing Group Leader @ Marvell Israel Ltd.
- Physical Design Engineer @ Marvell Israel Ltd.
- VLSI Design Engineer @ Marvell Israel Ltd.
- VLSI Post-Silicon Chip Verification engineer @ Marvell Israel Ltd.
- VLSI Design engineer @ LSI, an Avago Technologies Company
- Printed Circuit Board Design Engineer @ Elbit Systems Ltd
Sorel Horovitz's Education
- Technion - Israel Institute of Technology
BSC (Electronics)
1994 - 1998 - Ort Rehovot
Electrical and Electronics Technician
1986 - 1989
Sorel Horovitz's Skills
- ASIC
- SoC
- RTL design
- VLSI
- Static Timing Analysis
- Integrated Circuit Design
- IC
- Verilog
- DFT
- Semiconductors
Sorel Horovitz's Summary
Sorel Horovitz, based in Israel, is currently a Chip Design Manager at SatixFy, bringing experience from previous roles at Marvell Israel Ltd.. Sorel Horovitz holds a 1994 - 1998 BSC in Electronics @ Technion - Israel Institute of Technology. With a robust skill set that includes ASIC, SoC, RTL design, VLSI, Static Timing Analysis and more, Sorel Horovitz contributes valuable insights to the industry. Sorel Horovitz has 2 emails on RocketReach.
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