Sneha Chavan's Location
Portland, Oregon, United States
Sneha Chavan's Work
- ASIC Physical Design Engineer @ Google
- Senior Physical Design Engineer @ Intel Corporation
- SOC Design Engineer @ Intel Corporation
- FPGA IC Design Intern @ Xilinx
- Software Engineer @ HARMAN International
Sneha Chavan's Education
- Portland State University
Master of Science (MS) (Electrical and Computer Science)
2015 - 2017 - College of Engineering Pune
Bachelor of Technology (B.Tech.) (Electronics and Telecommunication Engineering)
2009 - 2013 - Yeshwant Mahavidyalay Nanded
Higher Secondary Certificate (94.83% , Electronics :(196/200))
2007 - 2009
- MP High School
S.S.C.
2001 - 2007
Sneha Chavan's Skills
- Matlab
- Python
- Programming
- Microsoft Office
- Java
- Microsoft Word
- Embedded Systems
- PowerPoint
- Microsoft Excel
- Testing
Sneha Chavan's Summary
Sneha Chavan, based in Portland, Oregon, United States, is currently a ASIC Physical Design Engineer at Google, bringing experience from previous roles at Intel Corporation, Xilinx and HARMAN International. Sneha Chavan holds a 2015 - 2017 Master of Science (MS) in Electrical and Computer Science @ Portland State University. With a robust skill set that includes Matlab, Python, Programming, Microsoft Office, Java and more, Sneha Chavan contributes valuable insights to the industry. Sneha Chavan has 3 emails and 1 mobile phone number on RocketReach.
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