Sidharth Iyer Email
Analog Validation Engineer @ Texas Instruments
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Sidharth Iyer Location
- Kottayam, KL, IN
Sidharth Iyer Work
- 2024 -now Analog Validation Engineer @
- 2024 -2024 Analog Validation Intern @
- 2023 -2023 Analog Engineering Intern @
- 2021 -2023 Member @
- 2022 -2023 Joint Secretary @
- 2022 -2022 Head of Lecture Committee @
- 2022 -2022 Hardware Intern @
Sidharth Iyer Education
- National Institute of Technology Calicut
Bachelor of Technology - BTech (Electrical and Electronics Engineering)
2020-2024
Sidharth Iyer Summary
- Sidharth Iyer, based in Kottayam, KL, IN, is currently a Analog Validation Engineer at Texas Instruments. Sidharth Iyer brings experience from previous roles at Texas Instruments, Team Unwired and IEEE SB NITC. Sidharth Iyer holds a 2020 - 2024 Bachelor of Technology - BTech in Electrical and Electronics Engineering @ National Institute of Technology Calicut. Sidharth Iyer has 2 emails on RocketReach.
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