Siddharth Sawant's Location
San Jose, CA, US
Siddharth Sawant's Work
- Sr. Technical Program Manager, Silicon @ Aeva, Inc
- Senior Member Of Technical Staff (Hardware Lead) @ GlobalFoundries
- Member of Technical Staff (Hardware Lead) @ GlobalFoundries
- Design Implementation Engineer(Synthesis, timing(STA), Conformal LEC- Implementation Engineer) @ Qualcomm
- Graphics Hardware Engineer @ Intel Corporation
- Design Engineer @ Microchip Technology Inc.
- Analog Engineering Intern @ Microchip Technology Inc.
Siddharth Sawant's Education
- Harvard Business School Online
CORe Program-Business Analytics, Economics for Managers, and Financial Accounting (Pass with High Honors)
- Wharton Online
Certificate (Introduction to Marketing)
2020 - 2021 - Arizona State University
Masters of Science (Electrical Engineering(Analog and mixed signal circuit design))
2009 - 2011
- University of Mumbai
Bachelor of Engineering (Electronics and Telecommunication)
2005 - 2009
Siddharth Sawant's Skills
- Conformal Lec
- Synthesis
- Ic Design
- Analog Circuit Design
- Manual Eco
- Logic Synthesis
- Functional Verification
- Sta
- Analog
- Synopsys Formality
Siddharth Sawant's Summary
Siddharth Sawant, based in San Jose, CA, US, is currently a Sr. Technical Program Manager, Silicon at Aeva, bringing experience from previous roles at GLOBALFOUNDRIES, Qualcomm Inc. and Intel Corporation. Siddharth Sawant holds a CORe Program-Business Analytics, Economics for Managers, and Financial Accounting in Pass with High Honors @ Harvard Business School Online. With a robust skill set that includes Conformal Lec, Synthesis, Ic Design, Analog Circuit Design, Manual Eco and more, Siddharth Sawant contributes valuable insights to the industry. Siddharth Sawant has 3 emails and 1 mobile phone number on RocketReach.
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