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Siddhant Mathur Location
California, United States
Siddhant Mathur Work
CPU RTL Engineer @ (August 2024 - Present)
Graduate Teaching Assistant @ (May 2023 - August 2024)
Siddhant Mathur Education
University of Pennsylvania
Master of Science - MS (Electrical Engineering)
2022-2024
Delhi Technological University (Formerly DCE)
Bachelor of Technology - BTech (Electronics and Communications Engineering)
2018-2022
Siddhant Mathur Skills
Application-Specific Integrated Circuits (ASIC)
Caches and Out of Order Execution
Cadence Virtuoso
Computer Architecture
Design Rule Checking (DRC)
Digital Circuit Design
Digital Logic Design
FPGA Programming
FPGA Programming with OpenCL
High-level Synthesis( HLS)
Layout Versus Schematic (LVS)
RTL Design
RTL Verification
Superscalar and Pipelined CPU Design
System on a Chip (SoC)
Verilog
Very-Large-Scale Integration (VLSI)
Vitis HLS
Xilinx Vivado
Siddhant Mathur Summary
Siddhant Mathur, based in California, United States, is currently a CPU RTL Engineer at Qualcomm. Siddhant Mathur brings experience from previous roles at University of Pennsylvania. Siddhant Mathur holds a 2022 - 2024 Master of Science - MS in Electrical Engineering @ University of Pennsylvania. With a robust skill set that includes Application-Specific Integrated Circuits (ASIC), Caches and Out of Order Execution, Cadence Virtuoso, Computer Architecture, Design Rule Checking (DRC) and more. Siddhant Mathur has 2 emails on RocketReach.
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