Shuping Lin's Location
Taipei City, Taiwan, Taiwan
Shuping Lin's Work
- Senior Engineer, ASIC Mixed Signal Design Verification @ NVIDIA Taiwan
- Senior Design Verification Engineer @ Nephos (a Mediatek Company)
- Senior ASIC Design Verification Engineer @ Marvell India
- Data-center Switch IC Designer @ MediaTek
- Product Management Internship @ Koyo Industrial Co. Ltd
Shuping Lin's Education
- National Chiao Tung University
Master of Engineering (M.Eng.) (Electrical and Electronics Engineering)
2010 - KU Leuven
Master of Engineering (M.Eng.) (Electrical and Electronics Engineering)
2010 - University of Illinois at Urbana-Champaign
Exchange Student (電子資訊)
2010
- National Chiao Tung University
Bachelor's degree (Electronics Engineering)
2006
Shuping Lin's Skills
- Verilog
- Ethernet
- Networking
- Semiconductors
- Matlab
- Electronics
- C
- Embedded Systems
- Simulations
- VHDL
Shuping Lin's Summary
Shuping Lin, based in Taipei City, Taiwan, Taiwan, is currently a Senior Engineer, ASIC Mixed Signal Design Verification at NVIDIA 台灣, bringing experience from previous roles at Nephos (a Mediatek Company), Marvell Semiconductor, MediaTek and Koyo Industrial Co. Ltd. Shuping Lin holds a Master of Engineering (M.Eng.) in Electrical and Electronics Engineering @ National Chiao Tung University. With a robust skill set that includes Verilog, Ethernet, Networking, Semiconductors, Matlab and more, Shuping Lin contributes valuable insights to the industry. Shuping Lin has 1 email on RocketReach.
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