Shravanthi Reddy Email & Phone Number
Design Verification Engineer @ Annapurna Labs
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Shravanthi Reddy Location
- California, United States
Shravanthi Reddy Work
- Design Verification Engineer @ (June 2022 - Present)
- ASIC Digital Design Engineer Sr I @ (December 2021 - July 2022)
- ASIC Digital Design Engineer II @ (April 2019 - December 2021)
- ASIC Engineer @ (September 2018 - March 2019)
- ASIC Design Intern @ (July 2017 - December 2017)
- Project Intern @ South Central Railway workshop,India (January 2016 - April 2016)
Shravanthi Reddy Education
- University of Texas at Dallas 2016-2018
- Chaitanya Bharathi Institute Of Technology
Bachelor Of Engineering (Communication, Engineering, Electronics)
2012-2016 - Rainbow Concept School,Mahabubnagar 2005-2010
Shravanthi Reddy Skills
- Matlab
- Microsoft Office
- Microsoft Word
- Electronics
- PowerPoint
- Microsoft Excel
- English
- VLSI
- Electrical Engineering
- Microsimulation
- VHDL
- C
- Environmental Awareness
- Drawing
- Windows
- Verilog
- Python
- Microprocessors
- Xilinx ISE
- Assembly Language
- Computer Architecture
- System Verilog
- Synopsys tools
- Synopsys Primetime
- Cadence Encounter
- Cadence Virtuoso Layout Editor
- Cadence Virtuoso
- Cadence Icfb
- CPLEX
- Tetramax
- C++
- Embedded Systems
- Simulations
- Testing
- Cadence
Shravanthi Reddy Summary
- Shravanthi Reddy, based in California, United States, is currently a Design Verification Engineer at Annapurna Labs. Shravanthi Reddy brings experience from previous roles at Synopsys Inc and Marvell Semiconductor. Shravanthi Reddy holds a 2016 - 2018 University of Texas at Dallas. With a robust skill set that includes Matlab, Microsoft Office, Microsoft Word, Electronics, PowerPoint and more. Shravanthi Reddy has 1 emails and 1 mobile phone numbers on RocketReach.
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