Sharon T Email & Phone Number
Circuit Design Engineering Manager @ Intel Corporation
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Sharon T Location
- Austin, TX, US
Sharon T Work
- Circuit Design Engineering Manager @ (March 2022 - Present)
- Component Design Engineer @ (September 2013 - Present)
- Standard cell Library Design Intern @ (September 2012 - December 2012)
- Programmer Analyst Trainee @ (December 2010 - July 2011)
- Research Intern @ (May 2010 - August 2010)
Sharon T Education
- Arizona State University
Master's degree (Electrical and Electronics Engineering)
2011-2013
Sharon T Skills
- Verilog
- Amplifiers
- Mixed Signal
- Cadence Virtuoso
- Oscilloscope
- Xilinx ISE
- Engineering Management
- VLSI
- SystemVerilog
- Hardware Development
- ModelSim
- ASIC
- Computer Architecture
- Integrated Circuit Design
- Low-power Design
- Xilinx
- Design Management
- Design Specifications
- Business Analysis
- Graphic Design
- Low Power Design
- Integrated Circuit
- Management
- Customer Service
Sharon T Summary
- Sharon T, based in Austin, TX, US, is currently a Circuit Design Engineering Manager at Intel Corporation. Sharon T brings experience from previous roles at Intel Corporation, Microchip Technology, Cognizant Technology Solutions and Indian Institute of Science. Sharon T holds a 2011 - 2013 Master's degree in Electrical and Electronics Engineering @ Arizona State University. With a robust skill set that includes Verilog, Amplifiers, Mixed Signal, Cadence Virtuoso, Oscilloscope and more. Sharon T has 5 emails and 4 mobile phone numbers on RocketReach.
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