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Shareef Jalloq Location
Cambridge, Cambridgeshire, United Kingdom
Shareef Jalloq Work
Principal Engineer @ (October 2021 - Present)
Principal Engineer @ (June 2021 - October 2021)
Principal Engineer @ Cottenham Consultants (April 2020 - June 2021)
Principal Engineer @ (December 2020 - May 2021)
Principal Engineer @ (May 2020 - December 2020)
Principal Engineer @ (April 2019 - April 2020)
Digital Hardware Engineer @ (September 2017 - April 2019)
Graphics Hardware Engineer @ (March 2010 - August 2017)
Asic Design Engineer @ (October 2006 - January 2010)
Senior Cpu Design Engineer @ (October 2001 - September 2006)
Industrial Placement Student @ Defence Evaluation and Research Agency (August 1999 - July 2000)
Shareef Jalloq Education
University of Birmingham 1997-2001
Shareef Jalloq Skills
Verilator
Formal Verification
Application-Specific Integrated Circuits (ASIC)
Integrated Circuit Design
RTL Design
Electronics
Printed Circuit Board (PCB) Design
OrCAD Capture CIS
Lattice
Altera Quartus
Field-Programmable Gate Arrays (FPGA)
Verilog
Questa
Shareef Jalloq Summary
Shareef Jalloq, based in Cambridge, Cambridgeshire, United Kingdom, is currently a Principal Engineer at Idex Asa. Shareef Jalloq brings experience from previous roles at Picocom, Cottenham Consultants, Systematic Design and Arm. Shareef Jalloq holds a 1997 - 2001 University of Birmingham. With a robust skill set that includes Verilator, Formal Verification, Application-Specific Integrated Circuits (ASIC), Integrated Circuit Design, RTL Design and more. Shareef Jalloq has 2 emails on RocketReach.
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