Sharath C Email
System Validation Engineer @ Intel Corporation
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Sharath C Location
- California, United States
Sharath C Work
- System Validation Engineer @ (April 2024 - Present)
- System Validation Engineer @ (December 2021 - April 2024)
- Staff Electrical Engineer @ (September 2021 - December 2021)
- Electrical Engineer @ (July 2019 - September 2021)
- Associate Electrical Engineer @ (January 2019 - July 2019)
- Design Engineer -Intern @ (January 2018 - September 2018)
- Graduate Teaching Assistant @ (July 2017 - December 2017)
- Laboratory Assistant @ (April 2016 - July 2017)
- Assistant System Engineer @ (June 2014 - June 2015)
Sharath C Education
- Rochester Institute of Technology
Master of Science (M.S.)
- Sri Bhagawan Mahaveer Jain College of Engineering
Bachelor of Engineering - BE
Sharath C Skills
- Altera Quartus
- Analog Circuit Design
- Application-Specific Integrated Circuits (ASIC)
- C
- Cadence Virtuoso
- Cadence Virtuoso Layout Editor
- Clean Rooms
- Customer Service
- Embedded C
- Embedded Operating Systems
- Embedded Systems
- Hardware Architecture
- Hardware Diagnostics
- Integrated Circuit Design
- LabVIEW
- Layout Versus Schematic (LVS)
- MPLAB
- Matlab
- Microchip PIC
- Microcontrollers
- Microsoft Office
- Mixed-Signal IC Design
- Programming
- Semiconductors
- VHDL
- Verilog
- Very-Large-Scale Integration (VLSI)
- Windows
- ZigBee
Sharath C Summary
- Sharath C, based in California, United States, is currently a System Validation Engineer at Intel Corporation. Sharath C brings experience from previous roles at Intel Corporation and Itron, Inc.. Sharath C holds a Master of Science (M.S.) @ Rochester Institute of Technology. With a robust skill set that includes Altera Quartus, Analog Circuit Design, Application-Specific Integrated Circuits (ASIC), C, Cadence Virtuoso and more. Sharath C has 2 emails on RocketReach.
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