Sergey Avramenko Email
Principal Design Engineer @ NXP Semiconductors
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Sergey Avramenko Location
- Moscow, RU
Sergey Avramenko Work
- 2015 -now Principal Design Engineer @
- 2007 -2015 Senior Design Engineer @
- 1998 -2007 Library Validation engeneer @
Sergey Avramenko Education
- Московский Государственный Институт Электронной Техники (Технический Университет) (МИЭТ)
Sergey Avramenko Skills
- RTL Design
- ASIC
- System Verilog
- Static Timing Analysis
- SoC
- Place & Route
- Mixed Signal
- ATPG
- Digital/IO libraries development
- Equivalence Checking
- Logic Synthesis
- Scan Insertion
- DRC/LVS
- Functional Verification
- SystemVerilog
- Integrated Circuit Design
- Semiconductors
- Debugging
- CMOS
- Verilog
- IC
- Testing
- EDA
- Place And Route
- Application Specific Integrated Circuits Asic
Sergey Avramenko Summary
- Sergey Avramenko, based in Moscow, RU, is currently a Principal Design Engineer at NXP Semiconductors. Sergey Avramenko brings experience from previous roles at NXP acquires Freescale Semiconductor. Sergey Avramenko holds a Московский Государственный Институт Электронной Техники (Технический Университет) (МИЭТ). With a robust skill set that includes RTL Design, ASIC, System Verilog, Static Timing Analysis, SoC and more. Sergey Avramenko has 2 emails on RocketReach.
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