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Sean Vo Location
Pleasanton, CA, US
Sean Vo Work
2023 -now Sr. Principal Design DFT Engineer @
2021 -2023 Principal DFT Engineer @
2019 -2021 Principal DFT Engineer @
2018 -2019 Sr. DFT Technical Architect @
2017 -2018 Sr. Staff ASIC DFT Engineer @
2016 -2017 Design for DFT engineer @ Qualcomm
2012 -2016 Sr. Staff DFT Engineer @
2008 -2012 Sr. Staff DFT Engineer @
2003 -2008 Sr. Staff DFT Engineer @
1998 -2003 Staff Design and DFT @ NEC Electronics Inc.
Sean Vo Education
Santa Clara University
MSEE Program (VLSI Design Engineering)
1998-2000
Portland State University
BSEE (VLSI)
1985-1989
Sean Vo Summary
Sean Vo, based in Pleasanton, CA, US, is currently a Sr. Principal Design DFT Engineer at Jariet Technologies. Sean Vo brings experience from previous roles at Microsoft, Micron Technology, Intel Corporation and Juniper Networks. Sean Vo holds a 1998 - 2000 MSEE Program in VLSI Design Engineering @ Santa Clara University. Sean Vo has 2 emails and 2 mobile phone numbers on RocketReach.
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