Sean Chen's Location
San Jose, CA, US
Sean Chen's Work
- SMTS @ Intel Corporation
- Principal Engineer @ IDT - Integrated Device Technology, Inc.(acquired by Renesas)
- Design Manager @ IDT - Integrated Device Technology, Inc.(acquired by Renesas)
Sean Chen's Education
- Georgia Institute of Technology1995 - 1996
- National Tsing Hua University
(EE)
1988 - 1992 - National Tsing Hua University
Bachelor of Science - BS (Electrical and Electronics Engineering)
1988 - 1992
Sean Chen's Skills
- SystemVerilog
- PCIe
- Functional Verification
- SERDES
- LVS
- RTL design
- Debugging
- Timing
- SoC
- EDA
Sean Chen's Summary
Sean Chen, based in San Jose, CA, US, is currently a SMTS at Intel Corporation, bringing experience from previous roles at IDT. Sean Chen holds a 1995 - 1996 Georgia Institute of Technology. With a robust skill set that includes SystemVerilog, PCIe, Functional Verification, SERDES, LVS and more, Sean Chen contributes valuable insights to the industry. Sean Chen has 1 email on RocketReach.
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