Scott Tetreault's Location
Clinton, MA, US
Scott Tetreault's Work
- Asic Physical Design Lead @ Teradyne
- Principal Fpga Engineer @ Axiowave Networks
- Asic Physical Design Engineer @ IBM
- Verification Engineer @ Hewlett Packard Enterprise
- Principal Fpga Ip Engineer @ Mercury Systems
Scott Tetreault's Education
- University of Massachusetts Amherst
Bachelor of Science (Electrical Engineering)
1990 - 1994
Scott Tetreault's Skills
- Physical Design
- Hardware Architecture
- ASIC
- Logic Design
- FPGA
- SoC
- Verilog
- Debugging
Scott Tetreault's Summary
Scott Tetreault, based in Clinton, MA, US, is currently a Asic Physical Design Lead at Teradyne, bringing experience from previous roles at Axiowave Networks, Ibm, Hewlett Packard Enterprise and Mercury Systems. Scott Tetreault holds a 1990 - 1994 Bachelor of Science in Electrical Engineering @ University of Massachusetts Amherst. With a robust skill set that includes Physical Design, Hardware Architecture, ASIC, Logic Design, FPGA and more, Scott Tetreault contributes valuable insights to the industry. Scott Tetreault has 2 emails on RocketReach.
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