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Scott Matlock Location
Austin, TX, US
Scott Matlock Work
Director Design Engineering @ (March 2024 - Present)
Debug Lead @ (September 2022 - March 2024)
Director Design Engineering @ (September 2021 - September 2022)
Director, Design Engineering @ (July 2019 - September 2021)
Director Design Engineering @ (June 2017 - July 2019)
Senior Staff Engineer @ Samsung Austin R&D Center (SARC) (March 2015 - June 2017)
Principle Member Technical Staff @ (September 2011 - March 2015)
Senior Member Technical Staff @ (November 2005 - August 2011)
Engineer V @ (May 2003 - October 2005)
Engineer IV @ (May 1997 - April 2003)
Engineer III @ (February 1993 - April 1997)
Engineer II @ (September 1983 - January 1993)
Scott Matlock Education
University of Houston-Clear Lake 2001-2005
San Jacinto College 1997-2001
Scott Matlock Skills
RTL design
Semiconductors
DFT
FPGA
Windows
CPLD
Board Development
Power Electronics
C++ Language
Java
Verilog
VHDL
x86 Assembly
68k Assembly
8051 Microcontroller
ARM
AMBA
ACPI
Bios
UEFI
Linux
VxW
Interrupts
SAS
SATA
PCIe
X86
VMEbus
PCI Standards
SCSI
ISA
I2C
USB
TCP/IP
Real Time
Cache Coherency
HyperTransport
FSB
DDR3
SMP
Logic Analyzer
Oscilloscope
Protocol Analysis
Analog Circuit Design
Digital Designs
Signal Integrity
Project Engineering
Orcad
Viewlogic
Allegro
Scott Matlock Summary
Scott Matlock, based in Austin, TX, US, is currently a Director Design Engineering at AMD. Scott Matlock brings experience from previous roles at Ericsson and AMD. Scott Matlock holds a 2001 - 2005 University of Houston-Clear Lake. With a robust skill set that includes RTL design, Semiconductors, DFT, FPGA, Windows and more. Scott Matlock has 1 emails and 2 mobile phone numbers on RocketReach.
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