Viswakarma Institute of Information Technology, Pune
Bachelor of Engineering (B.E.) (Electronics and Telecommunications)
2010 - 2014
Laxmanrao Apte Jr. College, Pune
H.S.C (Science)
2008 - 2010
Chaitanya Vidyalaya, Otur
S.S.C
2005 - 2010
Sanket Phapale's Skills
Verilog
Synopsys tools
Perl
TCL Tk
Application Specific Integrated Circuits
Cadence Virtuoso
Physical Design
Static Timing Analysis
ModelSim
Altera Quartus
Sanket Phapale's Summary
Sanket Phapale, based in Bengaluru, KA, IN, is currently a RTL Design Engineer at Samsung Semiconductor India, bringing experience from previous roles at Intel Corporation. Sanket Phapale holds a 2015 - 2017 Master of Technology (M.Tech.) in VLSI Design @ Vellore Institute of Technology. With a robust skill set that includes Verilog, Synopsys tools, Perl, TCL Tk, Application Specific Integrated Circuits and more, Sanket Phapale contributes valuable insights to the industry. Sanket Phapale has 2 emails on RocketReach.