Sanjay Shinde's Location
Bengaluru, KA, IN
Sanjay Shinde's Work
- SOC Lead @ Intel Corporation
- ASIC Design Director 3DXP ENGG @ Micron Technology
- AVP @ Cientra (Formerly Mindlance Technologies)
- AVP @ Mindlance Technologies
- Director Technology SES @ Aricent
- ASIC Manager @ Broadcom
- ASIC Manager @ LSI, an Avago Technologies Company
- SOC Lead @ LSI, an Avago Technologies Company
- Lead Consultant. @ Infosys Technologies Limited.
- Lead Design Engineer @ PMC-Sierra is now Microsemi
Sanjay Shinde's Education
- ACTS CDAC Pune
PG Diploma VLSI
1998 - 1998 - Savitribai Phule Pune University
BE E&TC
1992 - 1996 - Cusrow Wadia Institute of Technology Pune
DERE
1989 - 1991
- H A School Pimpri.1984 - 1987
Sanjay Shinde's Skills
- Timing Closure
- SoC
- RTL design
- Semiconductors
- Static Timing Analysis
- Primetime
- ASIC
- IC
- Logic Synthesis
- Functional Verification
Sanjay Shinde's Summary
Sanjay Shinde, based in Bengaluru, KA, IN, is currently a SOC Lead at Intel Corporation, bringing experience from previous roles at Micron Technology, Cientra (Formerly Mindlance Technologies), Mindlance Technologies and Aricent. Sanjay Shinde holds a 1998 - 1998 PG Diploma VLSI @ ACTS CDAC Pune. With a robust skill set that includes Timing Closure, SoC, RTL design, Semiconductors, Static Timing Analysis and more, Sanjay Shinde contributes valuable insights to the industry. Sanjay Shinde has 2 emails on RocketReach.
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