Sanjay Radhakrishnan Email & Phone Number
MTS Silicon Design Engineer @ AMD
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Sanjay Radhakrishnan Location
- Austin, TX, US
Sanjay Radhakrishnan Work
- MTS Silicon Design Engineer @ (September 2021 - Present)
- Mixed Signal Design Engineer @ (June 2020 - September 2021)
- Graduate Technical Intern @ (May 2019 - November 2019)
- SoC Design Engineer @ (September 2015 - July 2018)
Sanjay Radhakrishnan Education
- Arizona State University
Master of Science - MS (Electrical and Electronics Engineering)
2018-2020
Sanjay Radhakrishnan Skills
- 3d nand
- Analog Circuit Design
- Application-Specific Integrated Circuits (ASIC)
- C
- C++
- CMOS
- Cadence
- Cadence Virtuoso
- Cadence Virtuoso Layout Editor
- Circuit Design
- Custom IC design
- Digital Electronics
- EDA
- FPGA
- Field-Programmable Gate Arrays (FPGA)
- Frequency Synthesizers
- High speed circuits
- Hspice
- Integrated Circuit Design
- Integrated Circuits (IC)
- Microsoft Office
- Mixed Signal
- Mixed-Signal IC Design
- Mixed-Signal Integrated Circuits
- Perl
- Physical Design
- Power Management
- Questa
- SV
- Semiconductors
- Static Timing Analysis
- SystemVerilog
- TCL
- UVM
- VLSI
- Verilog
- Very-Large-Scale Integration (VLSI)
- Virtuoso
- Virtuoso ADE
- Voltage
- Xilinx ISE
Sanjay Radhakrishnan Summary
- Sanjay Radhakrishnan, based in Austin, TX, US, is currently a MTS Silicon Design Engineer at AMD. Sanjay Radhakrishnan brings experience from previous roles at Intel Corporation. Sanjay Radhakrishnan holds a 2018 - 2020 Master of Science - MS in Electrical and Electronics Engineering @ Arizona State University. With a robust skill set that includes 3d nand, Analog Circuit Design, Application-Specific Integrated Circuits (ASIC), C, C++ and more. Sanjay Radhakrishnan has 2 emails and 2 mobile phone numbers on RocketReach.
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