ASIC Implementation Engineer @ (July 2021 - October 2023)
Senior Physical Design Engineer @ (July 2020 - July 2021)
Physical Design Engineer @ (November 2016 - June 2020)
Design Engineer Intern @ (July 2015 - August 2015)
Assistant Reliability Engineer @ (February 2014 - June 2014)
Sandy Wu Education
UCLA
Master of Science (MS) (Electrical Engineering)
2014-2016
Sandy Wu Skills
Cadence Virtuoso
Linux
Calibre
LTSpice
System On A Chip Soc
HSPICE
Perl
Matlab
Xilinx ISE
Layout
Verilog
Cadence Encounter
Integrated Circuits Ic
CMOS
Application Specific Integrated Circuits Asic
LVS
VHDL
ModelSim
C++
Csh
Python
DRC
Cadence Spectre
Physical Design
Apr
Very Large Scale Integration Vlsi
Cadence Innovus
Digital Circuit Design
Shell Scripting
Very Large Scale Integration
System on a Chip
Application Specific Integrated Circuits
Integrated Circuits
Sandy Wu Summary
Sandy Wu, based in California, United States, is currently a Senior Physical Design Engineer at Google. Sandy Wu brings experience from previous roles at Google, TSMC North America and TSMC. Sandy Wu holds a 2014 - 2016 Master of Science (MS) in Electrical Engineering @ UCLA. With a robust skill set that includes Cadence Virtuoso, Linux, Calibre, LTSpice, System On A Chip Soc and more. Sandy Wu has 3 emails and 2 mobile phone numbers on RocketReach.
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