Director, Validation Engineering @ (April 2019 - April 2023)
Senior Staff Manager @ (December 2013 - April 2019)
Engineering Manager and Staff Engineer @ (March 2011 - November 2013)
Staff Engineer and Team Lead @ (December 2009 - March 2011)
Senior Applications Engineer @ (February 2006 - December 2009)
Systems Application Engineer @ (October 2003 - January 2006)
Product Engineer, DRAM R and D @ Micron Semiconductors (October 2002 - February 2003)
Sameer Vaidya Education
Clemson University
M.S (Electrical Engineering)
2000-2002
Savitribai Phule Pune University
B.E (Electrical Engineering)
1995-1999
Sameer Vaidya Skills
ASIC
Analog
CMOS
Debugging
FPGA
Hard Drives
IC
Mixed Signal
Semiconductors
Signal Processing
SoC
VLSI
Verilog
RTL design
SystemVerilog
Processors
Static Timing Analysis
Software Development
Low Power Design
Sameer Vaidya Summary
Sameer Vaidya, based in California, United States, is currently a Principal Engineer, Technical Program Manager at Ayar Labs. Sameer Vaidya brings experience from previous roles at Marvell Technology. Sameer Vaidya holds a 2000 - 2002 M.S in Electrical Engineering @ Clemson University. With a robust skill set that includes ASIC, Analog, CMOS, Debugging, FPGA and more. Sameer Vaidya has 2 emails and 2 mobile phone numbers on RocketReach.
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