Sameep Shah Location
- Austin, TX, US
Sameep Shah Work
- 2025 - now Sr. ASIC Design Engineer @
- 2021 - 2025 Member Of Technical Staff @
- 2021 - 2021 Senior ASIC Design Engineer @
- 2019 - 2021 Senior ASIC Design Engineer @ Innovium Inc.
- 2016 - 2019 RTL Design Engineer @
- 2015 - 2016 Post Silicon Debug Engineer @
- 2011 - 2015 DFx RTL and Validation Engineer @
- 2011 - 2011 Full Chip SoC Validation Intern @
- 2009 - 2010 Design Automation, Full Chip Flow Intern @
- 2008 - 2008 Facilities Engineering Intern @
Sameep Shah Education
- The University of Texas at Austin
BS ( Electrical/Computer Engineering - VLSI & Computer Design )
2007 - 2011
Sameep Shah Skills
- Verilog
- VHDL
- Unix
- Perl
- Debugging
- VCS
- Verdi
- Debussy
- Unix Shell Scripting
- Vim
- Cadence Virtuoso
- C++
- C
- Microarchitecture
- Integrated Circuit Design
- Xilinx ISE
- ModelSim
- Simulations
- Pspice
- Labview
- SoC
- Computer Architecture
- Functional Verification
- RTL design
- VLSI
- System on a Chip (SoC)
- Python (Programming Language)
- System on a Chip Soc
- Dfd
- Data Validation
- DFT
- Intel
- Engineers
- Validation
- Components
- SAN
- Integrated Circuit
- Root Cause
- Semiconductors
- Design
- System on a Chip
Sameep Shah Summary
- Sameep Shah, based in Austin, TX, US, is currently a Sr. ASIC Design Engineer at Amazon. Sameep Shah brings experience from previous roles at Enfabrica, Marvell Technology, Innovium Inc. and Intel Corporation. Sameep Shah holds a 2007 - 2011 BS in Electrical/Computer Engineering - VLSI & Computer Design @ The University of Texas at Austin . With a robust skill set that includes Verilog, VHDL, Unix, Perl, Debugging and more. Sameep Shah has 1 emails and 1 mobile phone numbers on RocketReach.
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