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Samarth Kulkarni Location
Bengaluru, KA, IN
Samarth Kulkarni Work
Senior Lead Engineer @ (March 2024 - Present)
Senior Application Engineer @ (June 2022 - March 2024)
Physical Design Engineer @ (April 2020 - May 2022)
Product Engineer @ (July 2019 - March 2020)
Intern @ (August 2018 - May 2019)
Samarth Kulkarni Education
Amrita Vishwa Vidyapeetham, Coimbatore
Master of Technology - MTech (VLSI DESIGN)
2017-2019
University of Mumbai
Bachelor of Engineering - BE (Electrical, Electronics and Communications Engineering)
2013-2017
Samarth Kulkarni Skills
C
C (Programming Language)
CMOS
Cadence
Cadence Encounter
Cadence Virtuoso
Circuit Design
Clock Tree Synthesis
EDA
Genus
Genus
ICC2
Innovus
Innovus
Logic Synthesis
Management
Microsoft Excel
Microsoft Office
Microsoft PowerPoint
Microsoft Word
P&R
PNR
Perl
Physical Design
Physical Synthesis
Place & Route
Semiconductors
Shell Scripting
Static Timing Analysis
Synopsys tools
TCL
Timing Closure
Verilog
Very-Large-Scale Integration (VLSI)
Samarth Kulkarni Summary
Samarth Kulkarni, based in Bengaluru, KA, IN, is currently a Senior Lead Engineer at Qualcomm. Samarth Kulkarni brings experience from previous roles at Cadence Design Systems, AdeptChips and Wafer Space. Samarth Kulkarni holds a 2017 - 2019 Master of Technology - MTech in VLSI DESIGN @ Amrita Vishwa Vidyapeetham, Coimbatore. With a robust skill set that includes C, C (Programming Language), CMOS, Cadence, Cadence Encounter and more. Samarth Kulkarni has 2 emails on RocketReach.
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