Sam Choy Email & Phone Number
Senior Circuit Design Engineer @ Intel Corporation
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Sam Choy Location
- Santa Clara, CA, US
Sam Choy Work
- Senior Circuit Design Engineer @ (July 2006 - Present)
- Silicon Debug Engineer @ (September 2000 - June 2006)
- Component Design Engineer @ (March 2003 - June 2005)
- Logic Validation Engineer @ (January 2000 - August 2000)
Sam Choy Education
- University of California, Davis
Bachelor of Science (BS) (Electrical Engineering)
1995-1999
Sam Choy Skills
- ASIC
- SoC
- RTL Design
- Circuit Design
- IC
- Semiconductors
- SystemVerilog
- Processors
- FPGA
- Verilog
- Debugging
- System on a Chip (SoC)
- Integrated Circuits (IC)
- Application-Specific Integrated Circuits (ASIC)
- Integrated Circuits Ic
- Application Specific Integrated Circuits Asic
- System On A Chip Soc
- System on a Chip
- Integrated Circuits
- Application Specific Integrated Circuits
Sam Choy Summary
- Sam Choy, based in Santa Clara, CA, US, is currently a Senior Circuit Design Engineer at Intel Corporation. Sam Choy brings experience from previous roles at Intel Corporation. Sam Choy holds a 1995 - 1999 Bachelor of Science (BS) in Electrical Engineering @ University of California, Davis. With a robust skill set that includes ASIC, SoC, RTL Design, Circuit Design, IC and more. Sam Choy has 4 emails and 2 mobile phone numbers on RocketReach.
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