Saketh Reddy Email
MTS Silicon Design Engineer @ AMD
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Saketh Reddy Location
- Hyderabad, IN
Saketh Reddy Work
- MTS Silicon Design Engineer @ (November 2025 - Present)
- Staff Engineer @ (December 2023 - November 2025)
- Senior Lead Engineer @ (December 2020 - November 2023)
- Senior Physical Design Engineer @ (December 2018 - November 2020)
- Physical Design Engineer @ (May 2016 - November 2018)
- Intern @ (July 2015 - April 2016)
Saketh Reddy Education
- Manipal Institute of Technology
Master's Degree, Microelectronics (Microelectronics)
2014-2016
Saketh Reddy Skills
- Cadence Encounter
- Cadence RTL Compiler
- Redhawk
- Synopsys Primetime PX
- Cadence Tempus
- Synopsys Primetime
- Perl
- Low-power Design
- Verilog
- C
- Unix
- Microsoft Excel
- Microsoft Word
- PowerPoint
- Microsoft Office
- Windows
- Linux
- Design Compiler Dc
- Icc Ii
- Synopsys Icc
- Low Power Design
- Cadence Innovus
- Design Compiler
Saketh Reddy Summary
- Saketh Reddy, based in Hyderabad, IN, is currently a MTS Silicon Design Engineer at AMD. Saketh Reddy brings experience from previous roles at Qualcomm and Intel Corporation. Saketh Reddy holds a 2014 - 2016 Master's Degree, Microelectronics in Microelectronics @ Manipal Institute of Technology. With a robust skill set that includes Cadence Encounter, Cadence RTL Compiler, Redhawk, Synopsys Primetime PX, Cadence Tempus and more. Saketh Reddy has 1 emails on RocketReach.
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